PowerPC Assembly programming for the GameCube

The Gamecube was a huge step up in capabilities for Nintendo.
Comparable to the PS2 and Dreamcast, Powered by the PowerPC CPU and ATI graphics The gamecube had powerful 3D graphics and capabilities.

Cpu 486mhz 759CXe
Ram 24MB
Video 3MB VRAM
Resolution 640x480

Useful Documents

YAGCD - Yet Another Gamecube Documentation

Screen display

In theory the Gamecube has a 640x480 display, however it only uses 4 bytes for every 2 pixels.

The gamecube uses a 'YUV' type display, where each pixel has a 8 bit brightness byte, but the color bytes are shared by neighboring pixels.

Take a look at the images on the left... The small image was drawn at 1x, the one on the right is 2x... The colors on the left hand image are different in places, because of the shared color information.

However If we treat the gamecube screen as 320x240, or 320x640 - halving the X axis, we can write the same color pixel to 4 bytes, and get the 'actual' colors we wanted!

MRGB-> YBR color

There's no way around itWe will need to convert our 24 bit RGB colors into the format for the Gamecube screen!

Color in RGB:    
  R = (R1+R2)/2
  G = (G1+G2)/2
  B = (B1+B2)/2

  Y1 = (77/256)*R1 + (150/256)*G1 + (29/256)*B1
  Y2 = (77/256)*R2 + (150/256)*G2 + (29/256)*B2
Encoded Color:
  cB = -(44/256)*R - (87/256)*G + (131/256)*B + 128
  cR = (131/256)*R - (110/256)*G - (21/256)*B + 128

Need help with your color maths??? I have a spreadsheet I used for the color conversions!

Download my 'Color conversion spreadsheet'

Memory Map

Cache through addresses are used to access hardware registers

start description
0x00000000 Physical addresses
0x80000000 Cached Addresses
0xC0000000 Cache-Through addresses (Uncached)

start description
0xc8000000 Embedded Framebuffer (EFB)
0xCC000000 Hardware registers
0xCC000000 CP - Command Processor
0xCC001000 PE - Pixel Engine
0xCC002000 VI - Video Interface
0xCC003000 PI - Processor Interface (Interrupt Interface)
0xCC004000 MI - Memory Interface
0xCC005000 AI - Audio Interface
0xCC006000 DI - DVD Interface
0xCC006400 SI - Serial Interface
0xCC006800 EXI - External Interface
0xCC006C00 Streaming Interface
0xCC008000 GX FIFO (Graphic display lists)
0xe0000000 L2 Cache
0xfff00000 IPL (mapped here at bootup)

Dol File format

DOL files are binary programs with a 256 byte header. In these tutorials we use ELF2DOL to make the DOL file with TEXT and DATA segments.
They are loaded into memory at 0x80003000, Your program code will start at 0x80003100

The Text segment is your program code.

Address Range Bytes
Purpose Sample
(Single Text seg)
0x0000-0x0001B 4 7 Offset to Text0-7 0x00000100
0x001C-0x0047 4 11 Offset to Data0-10 0x00000000
0x0048-0x0063 4 7 Loading Address for Text0-7 0x80003100
0x0064-0x008F 4 11 Loading Address for Data0-10 0x00000000
0x0090-0x00AB 4 7 Size of Text0-7 ProgEnd-ProgStart
0x00AC-0x00D7 4 11 Size of Data0-10 0x00000000
0x00D8-0x00DB 4 1 BSS Address 0x00000000
0x00DC-0x00DF 4 1 Size of BSS 0x00000000
0x00E0-0x00E3 4 1 Entry point (execution addr) 0x80003100
0x00F0-0x00FF - - Unused 0x00000000


Category Addr Purpose
RamVars 0x80000000 Gamecode
RamVars 0x80000004 Company
RamVars 0x80000006 Disk ID
RamVars 0x80000007 Version
RamVars 0x80000008 Streaming
RamVars 0x80000009 StreamBufSize
RamVars 0x8000000A padding zeros
RamVars 0x8000001C DVD magic word
RamVars 0x80000020 Magic word (how did the console boot?)
RamVars 0x80000024 Version (usually set to 1 by apploader)
RamVars 0x80000028 physical Memory Size
RamVars 0x8000002C Console type
RamVars 0x80000030 ArenaLo (==0x00000000)
RamVars 0x80000034 ArenaHi (==0x817fe8c0)
RamVars 0x80000038 FST Location in ram (==0x817fe8c0)
RamVars 0x8000003C FST Max Length (==0x00000024)
RamVars 0x80000040 flag for "debugger present" (used by __OSIsDebuggerPresent)
RamVars 0x80000044 Debugger Exception mask Bitmap, set to 0 at sdk lib start
RamVars 0x80000048 Exception hook destination (physical address)
RamVars 0x8000004C Temp for LR, Return from exception address (to return from
RamVars 0x80000050 padding zeros
RamVars 0x800000C0 Current OS context (physical address)
RamVars 0x800000C4 Previous OS interrupt mask
RamVars 0x800000C8 current OS interrupt mask
RamVars 0x800000CC TV Mode
RamVars 0x800000D0 ARAM size (internal+expansion) in bytes. set by
RamVars 0x800000D4 current OS Context (logical address)
RamVars 0x800000D8 default OS thread (logical address)
RamVars 0x800000DC active Thread queue, head thread (logical address)
RamVars 0x800000E0 active Thread queue, tail thread (logical address)
RamVars 0x800000E4 Current OS thread
RamVars 0x800000E8 Debug monitor size (in bytes)
RamVars 0x800000EC Debug monitor location (usually at the top of main
RamVars 0x800000F0 Console Simulated Memory Size, 0x01800000 (usually
RamVars 0x800000F4 DVD BI2 location in main memory (size of BI2 is
RamVars 0x800000F8 Bus Clock Speed, 162 MHz (=0x09a7ec80, 162000000)
RamVars 0x800000FC CPU Clock Speed, 486 MHz (=0x1cf7c580, 486000000)
RamVars 0x80000100 System Reset Interrupt
RamVars 0x80000200 Machine Check Interrupt
RamVars 0x80000300 DSI Interrupt
RamVars 0x80000400 ISI Interrupt
RamVars 0x80000500 External Interrupt
RamVars 0x80000600 Alignment Interrupt
RamVars 0x80000700 Program Interrupt
RamVars 0x80000800 FP unavailable Interrupt
RamVars 0x80000900 Decrementer Interrupt
RamVars 0x80000C00 System Call Interrupt
RamVars 0x80000D00 Trace Interrupt
RamVars 0x80000F00 Performance Monitor Interrupt
RamVars 0x80001300 IABR Interrupt
RamVars 0x80001400 reserved
RamVars 0x80001700 Thermal Interrupt
RamVars 0x80001800 unused/reserved (*)
RamVars 0x80003000 exception handler vectors (from sdk libs & ipl)
RamVars 0x8000303C padding/unused
RamVars 0x80003040 external interrupt handler vectors (from sdk libs & ipl)
RamVars 0x800030A4 padding/unused
RamVars 0x800030C0
RamVars 0x800030C4
RamVars 0x800030C8 First Module Header Pointer in Module Queue
RamVars 0x800030CC Last Module Header Pointer in Module Queue
RamVars 0x800030D0 Module String Table Pointer
RamVars 0x800030D4 A DOL size (total size of text/data sections), in bytes
RamVars 0x800030D8 B OS system time (set, when console is powered up)
RamVars 0x800030DC
RamVars 0x800030E0 (6=production pads ?)
RamVars 0x800030E4
RamVars 0x800030E6
RamVars 0x800030E7
RamVars 0x800030E8 set by OsInit() (debugger stuff?)
RamVars 0x800030E9 set by OsInit() (debugger stuff?)
RamVars 0x800030EA
RamVars 0x800030EC
RamVars 0x800030F0
RamVars 0x800030F2 Boot status
RamVars 0x800030F3
RamVars 0x800030F4
RamVars 0x800030F8
RamVars 0x800030FC
RamVars 0x80003100 Start of code (usually)
RamVars 0x80003140 Entry point (early SDK v1.0 applications)
RamVars 0x81200000 Load Address of the Apploader
RamVars 0x81300000 Load Address of Bootrom/IPL
CP CmdProc 0xCC000000 R - Status Register
CP CmdProc 0xCC000002 R - Control Register
CP CmdProc 0xCC000004 ar Register
CP CmdProc 0xCC00000E oken register
CP CmdProc 0xCC000010 ounding box - left
CP CmdProc 0xCC000012 ounding box - right
CP CmdProc 0xCC000014 ounding box - top
CP CmdProc 0xCC000016 ounding box - bottom
CP CmdProc 0xCC000020 p FIFO base lo
CP CmdProc 0xCC000022 p FIFO base hi
CP CmdProc 0xCC000024 p FIFO end lo
CP CmdProc 0xCC000026 p FIFO end hi
CP CmdProc 0xCC000028 p FIFO high watermark lo
CP CmdProc 0xCC00002A p FIFO high watermark hi
CP CmdProc 0xCC00002C p FIFO low watermark lo
CP CmdProc 0xCC00002E p FIFO low watermark hi
CP CmdProc 0xCC000030 p FIFO read/write distance lo
CP CmdProc 0xCC000032 p FIFO read/write distance hi
CP CmdProc 0xCC000034 p FIFO write pointer lo
CP CmdProc 0xCC000036 p FIFO write pointer hi
CP CmdProc 0xCC000038 p FIFO read pointer lo
CP CmdProc 0xCC00003A p FIFO read pointer hi
CP CmdProc 0xCC00003C p FIFO bp lo
CP CmdProc 0xCC00003E p FIFO bp hi
PE PxlEngn 0xCC001000 configuration
PE PxlEngn 0xCC001002 lpha configuration
PE PxlEngn 0xCC001004 estination alpha
PE PxlEngn 0xCC001006 lpha Mode
PE PxlEngn 0xCC001008 lpha Read (?)
PE PxlEngn 0xCC00100A nterrupt Status Register
PE PxlEngn 0xCC00100E E Token ?
VI VdoIntf 0xCC002000 TR - Vertical Timing Register
VI VdoIntf 0xCC002002 CR - Display Configuration Register
VI VdoIntf 0xCC002004 TR0 - Horizontal Timing 0
VI VdoIntf 0xCC002008 TR1 - Horizontal Timing 1
VI VdoIntf 0xCC00200C TO - Odd Field Vertical Timing Register
VI VdoIntf 0xCC002010 TE - Even Field Vertical Timing Register
VI VdoIntf 0xCC002014 BEI - Odd Field Burst Blanking Interval Register
VI VdoIntf 0xCC002018 BOI - Even Field Burst Blanking Interval Register
VI VdoIntf 0xCC00201C FBL - Top Field Base Register (L) (External Framebuffer Half
VI VdoIntf 0xCC002020 FBR - Top Field Base Register (R) (Only valid in 3D Mode)
VI VdoIntf 0xCC002024 FBL - Bottom Field Base Register (L) (External Framebuffer
VI VdoIntf 0xCC002028 FBR - Bottom Field Base Register (R) (Only valid in 3D Mode)
VI VdoIntf 0xCC00202C - current vertical Position
VI VdoIntf 0xCC00202E - current horizontal Position (?)
VI VdoIntf 0xCC002030 I0 - Display Interrupt 0
VI VdoIntf 0xCC002034 I1 - Display Interrupt 1
VI VdoIntf 0xCC002038 I2 - Display Interrupt 2
VI VdoIntf 0xCC00203C I3 - Display Interrupt 3
VI VdoIntf 0xCC002040 L0 - Display Latch Register 0
VI VdoIntf 0xCC002044 L1 - Display Latch Register 1
VI VdoIntf 0xCC002048 SW - Scaling Width Register
VI VdoIntf 0xCC00204A SR - Horizontal Scaling Register
VI VdoIntf 0xCC00204C CT0 - Filter Coefficient Table 0 (AA stuff)
VI VdoIntf 0xCC002050 CT1 - Filter Coefficient Table 1 (AA stuff)
VI VdoIntf 0xCC002054 CT2 - Filter Coefficient Table 2 (AA stuff)
VI VdoIntf 0xCC002058 CT3 - Filter Coefficient Table 3 (AA stuff)
VI VdoIntf 0xCC00205C CT4 - Filter Coefficient Table 4 (AA stuff)
VI VdoIntf 0xCC002060 CT5 - Filter Coefficient Table 5 (AA stuff)
VI VdoIntf 0xCC002064 CT6 - Filter Coefficient Table 6 (AA stuff)
VI VdoIntf 0xCC002068 (AA stuff)
VI VdoIntf 0xCC00206E ISEL - VI DTV Status Register
VI VdoIntf 0xCC002070
VI VdoIntf 0xCC002072 BE - Border HBE
VI VdoIntf 0xCC002074 BS - Border HBS
VI VdoIntf 0xCC002076 (unused?)
VI VdoIntf 0xCC002078 (unused?)
VI VdoIntf 0xCC00207C (unused?)
PI ProcIntf 0xCC003000 SR - interrupt cause
PI ProcIntf 0xCC003004 NTMR - interrupt mask
PI ProcIntf 0xCC00300C IFO Base Start
PI ProcIntf 0xCC003010 IFO Base End?
PI ProcIntf 0xCC003014 I (cpu) FIFO current Write Pointer?
PI ProcIntf 0xCC003018
PI ProcIntf 0xCC00301C
PI ProcIntf 0xCC003020
PI ProcIntf 0xCC003024 eset?
PI ProcIntf 0xCC00302C
MI MemIntf 0xCC004000 rotected Region No1
MI MemIntf 0xCC004004 rotected Region No2
MI MemIntf 0xCC004008 rotected Region No3
MI MemIntf 0xCC00400C rotected Region No4
MI MemIntf 0xCC004010 ype of the protection, 4*2 bits
MI MemIntf 0xCC00401C I interrupt mask
MI MemIntf 0xCC00401E nterrupt cause
MI MemIntf 0xCC004020
MI MemIntf 0xCC004022 DDRLO - address which failed protection rules
MI MemIntf 0xCC004024 DDRHI - address, which failed protection rules
MI MemIntf 0xCC004032 IMERHI
MI MemIntf 0xCC004034 IMERLO
MI MemIntf 0xCC004036 IMERHI
MI MemIntf 0xCC004038 IMERLO
MI MemIntf 0xCC00403A IMERHI
MI MemIntf 0xCC00403C IMERLO
MI MemIntf 0xCC00403E IMERHI
MI MemIntf 0xCC004040 IMERLO
MI MemIntf 0xCC004042 IMERHI
MI MemIntf 0xCC004044 IMERLO
MI MemIntf 0xCC004046 IMERHI
MI MemIntf 0xCC004048 IMERLO
MI MemIntf 0xCC00404A IMERHI
MI MemIntf 0xCC00404C IMERLO
MI MemIntf 0xCC00404E IMERHI
MI MemIntf 0xCC004050 IMERLO
MI MemIntf 0xCC004052 IMERHI
MI MemIntf 0xCC004054 IMERLO
MI MemIntf 0xCC004056 IMERHI
MI MemIntf 0xCC004058 IMERLO
MI MemIntf 0xCC00405A
AI AudIntf 0xCC005000 SP Mailbox High (to DSP)
AI AudIntf 0xCC005002 SP Mailbox Low (to DSP)
AI AudIntf 0xCC005004 Mailbox High (from DSP)
AI AudIntf 0xCC005006 Mailbox Low (from DSP)
AI AudIntf 0xCC00500A I DSP CSR - Control Status Register (DSP Status)
AI AudIntf 0xCC005012 R_SIZE
AI AudIntf 0xCC005016 R_MODE
AI AudIntf 0xCC00501A R_REFRESH
AI AudIntf 0xCC005020 R_DMA_MMADDR_H
AI AudIntf 0xCC005022 R_DMA_MMADDR_L
AI AudIntf 0xCC005024 R_DMA_ARADDR_H
AI AudIntf 0xCC005026 R_DMA_ARADDR_L
AI AudIntf 0xCC005028 R_DMA_CNT_H
AI AudIntf 0xCC00502A R_DMA_CNT_L
AI AudIntf 0xCC005030 MA Start address (High)
AI AudIntf 0xCC005032 MA Start address (Low)
AI AudIntf 0xCC005036 MA Control/DMA length (Length of Audio Data)
AI AudIntf 0xCC00503A MA Bytes left
DI DvdIntf 0xCC006000 ISR - DI Status Register
DI DvdIntf 0xCC006004 ICVR - DI Cover Register (status2)
DI DvdIntf 0xCC006008 ICMDBUF0 - DI Command Buffer 0
DI DvdIntf 0xCC00600C ICMDBUF1 - DI Command Buffer 1 (offset in 32 bit words)
DI DvdIntf 0xCC006010 ICMDBUF2 - DI Command Buffer 2 (source length)
DI DvdIntf 0xCC006014 IMAR - DMA Memory Address Register
DI DvdIntf 0xCC006018 ILENGTH - DI DMA Transfer Length Register
DI DvdIntf 0xCC00601C ICR - DI Control Register
DI DvdIntf 0xCC006020 IIMMBUF - DI immediate data buffer (error code ?)
DI DvdIntf 0xCC006024 FG - DI Configuration Register
SI SerIntf 0xCC006400 SIC0OUTBUF - SI Channel 0 Output Buffer (Joy-channel 1 Command)
SI SerIntf 0xCC006404 Joy-channel 1 Buttons 1
SI SerIntf 0xCC006408 Joy-channel 1 Buttons 2
SI SerIntf 0xCC00640C SIC1OUTBUF - SI Channel 1 Output Buffer (Joy-channel 2 Command)
SI SerIntf 0xCC006410 SIC1INBUFH - SI Channel 1 Input Buffer High (Joy-channel 2 Buttons 1)
SI SerIntf 0xCC006414 Joy-channel 2 Buttons 2
SI SerIntf 0xCC006418 SIC2OUTBUF - SI Channel 2 Output Buffer (Joy-channel 3 Command)
SI SerIntf 0xCC00641C Joy-channel 3 Buttons 1
SI SerIntf 0xCC006420 Joy-channel 3 Buttons 2
SI SerIntf 0xCC006424 SIC3OUTBUF - SI Channel 3 Output Buffer (Joy-channel 4 Command)
SI SerIntf 0xCC006428 Joy-channel 4 Buttons 1
SI SerIntf 0xCC00642C SIC3INBUFL - SI Channel 3 Input Buffer Low (Joy-channel 4 Buttons 2)
SI SerIntf 0xCC006430 SIPOLL - SI Poll Register (Joy-channel Control (?) (Calibration gun ?))
SI SerIntf 0xCC006434 SICOMCSR - SI Communication Control Status Register (command)
SI SerIntf 0xCC006438 SISR - SI Status Register (channel select & status2)
SI SerIntf 0xCC00643C SIEXILK - SI EXI Clock Lock
SI SerIntf 0xCC006480 SI I/O buffer (access by word)
EXI EXtnIntf 0xCC006800 0CSR - EXI Channel 0 Parameter Register (Status?)
EXI EXtnIntf 0xCC006804 XI0MAR - EXI Channel 0 DMA Start Address
EXI EXtnIntf 0xCC006808 XI0LENGTH - EXI Channel 0 DMA Transfer Length
EXI EXtnIntf 0xCC00680C XI0CR - EXI Channel 0 Control Register
EXI EXtnIntf 0xCC006810 XI0DATA - EXI Channel 0 Immediate Data
EXI EXtnIntf 0xCC006814 1CSR - EXI Channel 1 Parameter Register
EXI EXtnIntf 0xCC006818 XI1MAR - EXI Channel 1 DMA Start Address
EXI EXtnIntf 0xCC00681C Channel 1 DMA Transfer Length
EXI EXtnIntf 0xCC006820 XI1CR - EXI Channel 1 Control Register
EXI EXtnIntf 0xCC006824 XI1DATA - EXI Channel 1 Immediate Data
EXI EXtnIntf 0xCC006828 2CSR - EXI Channel 2 Parameter Register
EXI EXtnIntf 0xCC00682C XI2MAR - EXI Channel 2 DMA Start Address
EXI EXtnIntf 0xCC006830 Channel 2 DMA Transfer Length
EXI EXtnIntf 0xCC006834 XI2CR - EXI Channel 2 Control Register
EXI EXtnIntf 0xCC006838 XI2DATA - EXI Channel 2 Immediate Data
StrIntf 0xCC006C00 ICR - Audio Interface Control Register
StrIntf 0xCC006C04 IVR - Audio Interface Volume Register
StrIntf 0xCC006C08 CNT - Audio Interface Sample Counter
StrIntf 0xCC006C0C IIT - Audio Interface Interrupt Timing


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