	include "\SrcAll_SH2\BasicMacros.asm"
	include "\SrcAll_SH2\BasicHeader.asm"
		

	;bra AddSubCarry
	;nop
	
	;bra AddSubOverflow
	;nop
	
	;bra SwapExtract
	;nop
	
	;bra Multiply
	;nop
	
	;bra MultiplyMAC
	;nop
	
	;bra Divide
	;nop
	
	
	bra RareCommands
	nop
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
AddSubCarry:
	mov #$00000000,r0	;Test Val
	mov #$87654321,r1
	
	mov #$00000000,r3			;Val to add or subtract
	mov #$33333333,r4
	
	mov #9,r2			;Loop counter
CarryTest1:
	bsr MonitorR0R1SR
	nop
	
	clrt				;Clear the T flag
	addc r4,r1			;R1=R1+R4+T
	addc r3,r0			;R0=R0+R3+T
	
	dt r2
	bf CarryTest1
	
	bsr NewLine
	nop
	
	mov #9,r2			;Loop counter
CarryTest2:
	bsr MonitorR0R1SR
	nop
	
	clrt				;Clear The T flag
	subc r4,r1			;R1=R1-(R4+T)
	subc r3,r0			;R0=R0-(R3+T)
	
	dt r2
	bf CarryTest2
	
	bsr NewLine
	nop
	
	bsr MonitorR0R1SR
	nop
	
	bra ExampleDone
	nop
	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	

AddSubOverflow:	
	mov #-3,r0	;Test Value
	mov #$00000001,r1	;Amount to add/sub
	
	mov #9,r2			;Loop Count
CarryTest3:

	addv r1,r0			;T=1 if sign changed due to overflow
	
	bsr MonitorR0R1SR
	nop
	dt r2
	bf CarryTest3
	
	bsr NewLine
	nop
	
	mov #9,r2			;Loop Count
CarryTest4:

	subv r1,r0			;T=1 if sign changed due to overflow
	
	bsr MonitorR0R1SR
	nop
	dt r2
	bf CarryTest4
	
	bsr NewLine
	nop
	bsr MonitorR0R1SR
	nop

	bra ExampleDone
	nop
	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
SwapExtract:

	mov #$01234567,r0
	mov #$FEDCBA98,r1
	
	bsr MonitorR0R1SR
	nop
	bsr NewLine
	nop
	
	swap.b r0,r0 		;Swap the two 8 bit bytes of the 16 bit word in R0
	
	swap.w r1,r1 		;Swap the two 16 bit words of the 32 bit long in R1
	
	bsr MonitorR0R1SR
	nop
	bsr NewLine
	nop
	bsr MonitorR0R1SR
	nop
	
	xtrct r0,r1			;Extract the middle of R0,R1, storing in R1
	
	bsr MonitorR0R1SR
	nop
	
	bra ExampleDone
	nop
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	

RareCommands:

;You may not actually need these commands!
	
	
	mov #TestAddr2,r0
	tas.b @r0	;Test and Set: When (Rn) is 0, 1 → T... 1 → MSB of (Rn)
	bsr MonitorR0R4SR
	nop
	
	add #1,r0
	tas.b @r0	;Test and Set: When (Rn) is 0, 1 → T... 1 → MSB of (Rn)
	bsr MonitorR0R4SR
	nop
	
	mov #16,r2			;Bytecount
	mov #TestAddr2,r1	;SourceAddr
	bsr MemDump			;Show Memory
	nop
	
	
	bsr NewLine
	nop
	
	
		
	
	;sleep		;Power down CPU until Interrupt	
	
	
	mov #MyVectors,r0	;Address of our Trap Vector Table
	ldc r0,vbr			;Transfer to Vector Base Register
	
	bsr Monitor
	nop
	
	trapa #1	;Execute Trap Vector 1 (system call) (no Delsy slot)
	trapa #2	;Execute Trap Vector 2 (system call) (no Delsy slot)
	
	bra ExampleDone
	nop
			
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
MyVectors:
	dc.l $00000000	;Trap 0
	dc.l MyVector1	;Trap 1
	dc.l MyVector2	;Trap 2
		
MyVector1:				;Trap PUSHes PC/SR
	mov #'T',r0			
	bsr PrintChar		
	nop
	rte					;Return from Exception (POP PC/SR from stack)
	nop
	
MyVector2:				;Trap PUSHes PC/SR
	mov #'R',r0			
	bsr PrintChar		
	nop
	rte					;Return from Exception (POP PC/SR from stack)
	nop
		
		
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	ltorg		;Literal Org, Values too large will be stored here by the assembler 

TestAddr2:	
		dc.l $01000100
		dc.l $01000100
		dc.l $01000100
		dc.l $01000100
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	

Multiply:
	mov #3,r0
	mov #$F0001000,r1	;F will be ignored, as MULU is 16 bit
	
	mulu R0,R1 	;Multiply as Unsigned Word... 
				;MACL(32bit) = R0(16bit) * R1(16bit) MACH=unchanged
	sts macl,r2	;Result in R2
	
	bsr Monitor3
	nop
	
	mov #-3,r0
	mov #$F0001000,r1	;F will be ignored, as MULS is 16 bit
	
	muls r0,r1 	;Multiply as Signed Word... 
				;MACL(32bit) = R0(16bit) * R1(16bit) MACH=unchanged
	sts macl,r2	;Result in R2
	
	bsr Monitor3
	nop
	
	
	
	 
	mov #$01001000,r0
	mov #$00000003,r1
	
	mul r0,r1	 	;Multiply 32 bit (Signed or unsigned)
					;MACL(32bit) = R0(32bit) * R1(32bit) MACH=unchanged
	sts macl,r2		;Result in R2
		
	bsr Monitor3
	nop
	bsr NewLine
	nop	
	
	
	
	mov #$01001000,r0
	mov #$00003333,r1
	mov #0,r2
	bsr Monitor3
	nop
	
	DMULU.L R0,R1		;MACH:MACL=R0*R1 (Unsigned)
	
	sts mach,r0
	sts macl,r1			;Result in R0:R1
	
	bsr Monitor3
	nop
	bsr NewLine
	nop	
	
	mov #$01001000,r0
	mov #-$00003333,r1
	mov #0,r2
	bsr Monitor3
	nop
	
	DMULS.L R0,R1		;MACH:MACL=R0*R1 (Signed)
	
	sts mach,r0
	sts macl,r1			;Result in R0:R1
		
	bsr Monitor3
	nop
			
	bra ExampleDone
	nop
	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
	
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	
MultiplyMAC:
	mov #MultDataW,r3
	mov #MultDataW2,r4
	
	clrmac			;Clear MACH+MACL
	sts macl,r1	
	sts mach,r0
	
	mov #3,r2		;Loop Count
MacAgain:		
	bsr Monitor6
	nop
	
	mac @r3+,@R4+ 	;Multiply and accumulate Signed Word... 
	sts macl,r1		;MACL(32bit) = @R0(16bit) * @R1(16bit) MACH=overflow
	sts mach,r0
	
	dt r2
	bf MacAgain
	
	bsr Monitor6
	nop
	bsr NewLine
	nop	
		
	mov #MultDataL,r3
	mov #MultDataL2,r4
	
	clrmac				;Clear MACH+MACL
	sts macl,r1	
	sts mach,r0
	
	mov #3,r2			;Loop Count
MacAgain2:		
	bsr Monitor6
	nop
	
	mac.l @r3+,@R4+ 	;Multiply and accumulate Signed Word... 
	sts macl,r1			;MACH:MACL(64bit) = @R0(32bit) * @R1(32bit) 
	sts mach,r0
	
	dt r2
	bf MacAgain2
	
	bsr Monitor6
	nop
	bsr NewLine
	nop	
	bra ExampleDone
	nop
	
	ltorg	
MultDataW:
	dc.w $0001
	dc.w $0010
	dc.w $1000
MultDataW2:	
	dc.w $0003
	dc.w $0004
	dc.w $0010
	
MultDataL:
	dc.l $00010000
	dc.l $00100000
	dc.l $10000000
MultDataL2:	
	dc.l $00000003
	dc.l $00000004
	dc.l $00001000
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	

	
Divide:
; R1 (32 bits) / R0 (16 bits) = R1 (16 bits):Unsigned	
	mov #$00003322,r1	;$3322/$3=110B (Rem 1)
	mov #$00000003,r0
	bsr Monitor3
	nop
	
	shll16 r0 	;Upper 16 bits = divisor, lower 16 bits = 0
	div0u 		;Flag initialization

	;We can't alter the T Q or M bits (DT loop would)
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	div1 r0,r1 ; Repeat 16 times
	
	rotcl R1	 	;Rotate with carry left
	extu.w R1,R1 	;R1 = Quotient
	
	bsr Monitor3
	nop
	bsr NewLine
	nop
	
	
; R1:R2 (64 bits)/R0 (32 bits) = R2 (32 bits):Unsigned
	mov #$00000003,r1	
	mov #$00003322,r2	
	mov #$00000300,r0
	bsr Monitor3
	nop
	
	div0u 			;Flag initialization
	
	stc sr,r4 		;use R4 to protect T Q M flags	
	mov #32,r3		;Loop count
DivLoop2:	
	ldc r4,sr
		ROTCL R2 	;Repeat 32 times
		DIV1 R0,R1 
	stc sr,r4
	
	dt r3
	bf DivLoop2
		
	ROTCL R2 		;R2 = Quotient
	
	bsr Monitor3
	nop
	bsr NewLine
	nop	
		
		
; R1 (16 bits)/R0 (16 bits) = R1 (16 bits):Signed
	mov #-$00000033,r1	;$FFCF / 3 = $FFEF
	mov #$00000003,r0
	bsr Monitor3
	nop

	SHLL16 R0 		;Upper 16 bits = divisor, lower 16 bits = 0
	EXTS.W R1,R1 	;Sign-extends the dividend to 32 bits
	MOV #0,r2 		;XOR R2,R2
	MOV R1,R3 		;
	ROTCL R3 		;
	SUBC R2,R1 		;Decrements if the dividend is negative
	DIV0S R0,R1 	;Flag initialization
	
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	DIV1 R0,R1 ;Repeat 16 times
	
	EXTS.W R1,R1
	ROTCL R1 		;R1 = quotient (one’s complement)
	ADDC R2,R1 		;Increments and takes the two’s 
					; complement if the MSB of the quotient is 1
	EXTS.W R1,R1 	;R1 = quotient (two’s complement)
			
	bsr Monitor3
	nop
	bsr NewLine
	nop	
	
	
	
	
; R2 (32 bits) / R0 (32 bits) = R2 (32 bits):Signed
	mov #-$00300033,r2	;$FFCFFFCD / 3 = $FFEFFFEF
	mov #$00000003,r0
	bsr Monitor3
	nop
	
	MOV R2,R3 	;
	ROTCL R3 	;
	SUBC R1,R1 	;Sign-extends the dividend to 64 bits (R1:R2)
	mov #0,r3 	;XOR R3,R3 
	SUBC R3,R2 	;Decrements and takes the one’s
				; complement if the dividend is negative
	DIV0S R0,R1 ;Flag initialization
	
	stc sr,r4 			;use R4 to protect T Q M flags	
	mov #32,r5			;Loop count
DivLoop4:	
	ldc r4,sr
		ROTCL R2 		;Repeat 32 times
		DIV1 R0,R1 
	stc sr,r4
	
	dt r5
	bf DivLoop4
	
	ROTCL R2 	;R2 = Quotient (one’s complement)
	ADDC R3,R2 	;Increments and takes the two’s complement if
				; the MSB of the quotient is 1.
				; R2 = Quotient (two’s complement)
	bsr Monitor3
	nop
	bra ExampleDone
	nop
		
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
ExampleDone:	
	bsr PageFlip			;Flip Buffer (for 32x)
	nop
	
InfLoop:	
	bra	InfLoop
	nop

	
	
;Anything too big for a 16 bit command (EG #$12345678) will be put
; at LTORG automatically by our assembler!
	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
		
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
MonitorR0R1SR:
	pushall
		stc sr,r6
			mov sp,r3
			add #60,r3	;Point to first pushed reg
			mov #0,r1 	;Reg label
		
				
			mov #2,r4	;Reg count
MonitorAgain2:
			mov.l @r3,r2	;Get reg
			add #-4,r3		;Move to next reg
		
			bsr ShowReg
			nop
				
			add #1,r1		;Reg label
		
			dt r4
			bf MonitorAgain2
		
		
			mov r6,r2 ;stc SR,r2
			mov #'S',r0
			mov #'R',r1
			bsr ShowRegSpec
			nop
			
			mov #' ',r0
			bsr PrintChar
			nop
			
			mov #'T',r0
			ldc r6,sr
			bt MonitorSRT2

			mov #'F',r0
MonitorSRT2:				
			bsr PrintChar
			nop
			
			bsr NewLine
			nop
		ldc r6,sr
	popall
	rts
	nop
	

	
MonitorR0R4SR:
	pushall
		stc sr,r6
			mov sp,r3
			add #60,r3	;Point to first pushed reg
			mov #0,r1 	;Reg label
		
			mov #3,r5	;Reg per line
			mov #5,r4	;Reg count
MonitorAgain5:
			mov.l @r3,r2	;Get reg
			add #-4,r3		;Move to next reg
		
			bsr ShowReg
			nop
				
			add #1,r1		;Reg label
			
		dt r5
		bf MonitorNoNL5
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL5:
		dt r4
		bf MonitorAgain5
		
		
			mov r6,r2 ;stc SR,r2
			mov #'S',r0
			mov #'R',r1
			bsr ShowRegSpec
			nop
			
			mov #' ',r0
			bsr PrintChar
			nop
			
			mov #'T',r0
			ldc r6,sr
			bt MonitorSRT

			mov #'F',r0
MonitorSRT:				
			bsr PrintChar
			nop
			
			bsr NewLine
			nop
			bsr NewLine
			nop
		ldc r6,sr
	popall
	rts
	nop
	

Monitor3:
	pushall
		mov sp,r3
		add #60,r3	;Point to first pushed reg
		mov #0,r1 	;Reg label
		
		
		mov #3,r5	;Reg per line
		
		mov #3,r4	;Reg count
MonitorAgain3:
		mov.l @r3,r2	;Get reg
		add #-4,r3		;Move to next reg
		
		bsr ShowReg
		nop
				
		add #1,r1		;Reg label
		
		dt r5
		bf MonitorNoNL3
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL3:
		dt r4
		bf MonitorAgain3
		
		bsr NewLine
		nop
	popall
	rts
	nop
	
Monitor6:
	pushall
		mov sp,r3
		add #60,r3	;Point to first pushed reg
		mov #0,r1 	;Reg label
		
		mov #3,r5	;Reg per line
		
		mov #6,r4	;Reg count
MonitorAgain6:
		mov.l @r3,r2	;Get reg
		add #-4,r3		;Move to next reg
		
		bsr ShowReg
		nop
				
		add #1,r1		;Reg label
		
		dt r5
		bf MonitorNoNL6
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL6:
		dt r4
		bf MonitorAgain6
		
		bsr NewLine
		nop
	popall
	rts
	nop
	
	include "\SrcAll_SH2\BasicFooter.asm"
	