	include "\SrcAll_SH2\BasicMacros.asm"
	include "\SrcAll_SH2\BasicHeader.asm"
		

	
	
	;bra LogicalOps
	;nop
	
	;bra ShiftsAriLog
	;nop

	;bra ShiftsLogical
	;nop
	
	
	;bra Rotate
	;nop
	
	;bra RotateWithCarry
	;nop
			
	;bra SignExtend
	;nop
	
	bra NegNot
	nop
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	


LogicalOps:
	mov #$FF770000,r3	;Test mask
	mov #$12345678,r4	;Test Value

	mov r4,r0
	mov r4,r1
	bsr MonitorR0R4SR
	nop

;And - Clear bits
	mov r4,r0
	mov r4,r1
	and #$F0,r0			;Dest register must be R0 with immediate
	and r3,r1			;R1=R1 AND R3
	
	bsr MonitorR0R4SR
	nop
	
;Or set bits
	mov r4,r0
	mov r4,r1
	or #$F0,r0			;Dest register must be R0 with immediate
	or r3,r1			;R1=R1 OR R3
		
	bsr MonitorR0R4SR
	nop

;Xor Flip bits	
	mov r4,r0
	mov r4,r1
	xor #$F0,r0			;Dest register must be R0 with immediate
	xor r3,r1			;R1=R1 OR R3
		
	bsr MonitorR0R4SR
	nop
	
;Test... like AND, result=0? T=1	
	mov #$FF7700F0,r0
	mov #$00005678,r1
	tst #$F0,r0			;Dest register must be R0
	tst r3,r1			;AND registers, result=0? T=1
		
	bsr MonitorR0R4SR
	nop
	
	bsr NewLine
	nop
	
	
	mov #TestAddr,r5
	ldc r5,gbr			;Transfer R0 to the GBR register
	
	mov #0,r0
	and.b #$F0,@(R0,GBR)
	
	add #1,r0
	or.b #$F0,@(R0,GBR)
	
	add #1,r0
	xor.b #$F0,@(R0,GBR)

	add #1,r0
	TST.B #$F0, @(R0,GBR)	;AND imm with addr , result=0? T=1!
	
	bsr MonitorR0R4SR
	nop
	
	mov #16,r2			;Bytecount
	mov #TestAddr,r1	;SourceAddr
	bsr MemDump			;Show Memory
	nop
		
	bra ExampleDone
	nop
		
	ltorg		;Literal Org
TestAddr:	
		dc.l $1212120F
		dc.l $121212F0
		dc.l $12121212
		dc.l $12121212
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	
	
ShiftsAriLog:
	mov #$87654321,r0
	mov #$87654321,r1
	
	mov #9,r2				;Loop Count
RotTest5:
	bsr MonitorR0R1SR
	nop
	
	shal r1					;Shift For Arithmetic Left
	
	shll r0					;Shift Logically Left
	
	dt r2
	bf RotTest5
	
	bsr NewLine
	nop
	
	mov #9,r2				;Loop Count
RotTest6:
	bsr MonitorR0R1SR
	nop
		
	shar r0					;Shift For Arithmetic Right (Signed)
	
	shlr r1					;Shift Logically Right (Unsigned)
	
	dt r2
	bf RotTest6
		
	bsr NewLine
	nop
	bsr MonitorR0R1SR
	nop

	bra ExampleDone
	nop
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 


	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	

ShiftsLogical:
	mov #$10100101,r0
	mov #$10100101,r1
			
	bsr MonitorR0R1SR
	nop
	
	shll2 r0			;Shift Left Logically 2 bits
	
	shlr2 r1			;Shift Right Logically 2 bits

	bsr MonitorR0R1SR
	nop
		
	shll8 r0			;Shift Left Logically 8 bits
	
	shlr8 r1			;Shift Right Logically 16 bits

	bsr MonitorR0R1SR
	nop
	
		
	shll16 r0			;Shift Left Logically 16 bits
	
	shlr16 r1			;Shift Right Logically 16 bits

	bsr MonitorR0R1SR
	nop
	
	
	bra ExampleDone
	nop
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 


	
		
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	
Rotate:
	mov #$40000004,r0
	mov #$87654321,r1
	
	mov #9,r2
RotTest3:
	bsr MonitorR0R1SR
	nop
	
	rotl r1		;Rotate Left
	rotl r0		;Rotate Left
	
	dt r2
	bf RotTest3
	
	bsr NewLine
	nop
	
	mov #9,r2
RotTest4:
	bsr MonitorR0R1SR
	nop
	
	rotr r0		;Rotate Right
	rotr r1		;Rotate Right
	
	dt r2
	bf RotTest4
		
	bsr NewLine
	nop
	bsr MonitorR0R1SR
	nop

	bra ExampleDone
	nop
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 

		
		
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	

RotateWithCarry:
	mov #$00000000,r0
	mov #$87654321,r1
	
	mov #9,r2		;Loop Count
RotTest1:
	bsr MonitorR0R1SR
	nop
	
	clrt			;T=0
	rotcl r1		;Rotate with carry
	rotcl r0		;Rotate with carry
	
	dt r2
	bf RotTest1
	
	bsr NewLine
	nop
	
	mov #9,r2		;Loop Count
RotTest2:
	bsr MonitorR0R1SR
	nop
	
	clrt			;T=0
	rotcr r0		;Rotate with carry
	rotcr r1		;Rotate with carry
	
	dt r2
	bf RotTest2
		
	bsr NewLine
	nop
	bsr MonitorR0R1SR
	nop

	bra ExampleDone
	nop
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
	
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	

SignExtend:
	mov #$1234FEDC,r0
	mov #$1234FEDC,r1
	
	exts.b r0,r3		;Sign Extend 8 bit byte to 32 bits
	exts.w r1,r4
	
	bsr MonitorR0R4SR
	nop

	extu.b r0,r3		;Zero Extend 8 bit byte to 32 bits
	extu.w r1,r4		;Zero Extend 16 bit word to 32 bits
	
	bsr MonitorR0R4SR
	nop
	
	bsr NewLine
	nop
	
	mov #$12341234,r0
	mov #$12341234,r1
	
	exts.b r0,r3		;Sign Extend 8 bit byte to 32 bits
	exts.w r1,r4		;Sign Extend 16 bit word to 32 bits
	
	bsr MonitorR0R4SR
	nop
	
	bra ExampleDone
	nop
	
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 

		
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
	
	
NegNot:
	mov #$00000000,r0
	mov #$00000123,r1
	bsr MonitorR0R4SR
	nop
	
	neg r1,r1				;R1=0-R1 (T flag unchanged)
	negc r0,r0				;Negate Carry (For 64 bits) R0=0-(R0+T)
	bsr MonitorR0R4SR
	nop
	
	
	mov #$00000000,r0
	mov #$00000123,r1
	not r0,r0				;R0=!R0
	not r1,r1				;R1=!R1
	bsr MonitorR0R4SR
	nop
	
	
	
	bra ExampleDone
	nop

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	

ExampleDone:	
	bsr PageFlip			;Flip Buffer (for 32x)
	nop
	
InfLoop:	
	bra	InfLoop
	nop

	
	
;Anything too big for a 16 bit command (EG #$12345678) will be put
; at LTORG automatically by our assembler!
	
	ltorg		;Literal Org, Values too large will be stored here by the assembler 
		
	align 4		;Ensure we're still 32 bit aligned (4 bytes = 32 bit)
	

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
	
MonitorR0R1SR:
	pushall
		stc sr,r6
			mov sp,r3
			add #60,r3	;Point to first pushed reg
			mov #0,r1 	;Reg label
		
				
			mov #2,r4	;Reg count
MonitorAgain2:
			mov.l @r3,r2	;Get reg
			add #-4,r3		;Move to next reg
		
			bsr ShowReg
			nop
				
			add #1,r1		;Reg label
		
			dt r4
			bf MonitorAgain2
		
		
			mov r6,r2 ;stc SR,r2
			mov #'S',r0
			mov #'R',r1
			bsr ShowRegSpec
			nop
			
			mov #' ',r0
			bsr PrintChar
			nop
			
			mov #'T',r0
			ldc r6,sr
			bt MonitorSRT2

			mov #'F',r0
MonitorSRT2:				
			bsr PrintChar
			nop
			
			bsr NewLine
			nop
		ldc r6,sr
	popall
	rts
	nop
	

	
MonitorR0R4SR:
	pushall
		stc sr,r6
			mov sp,r3
			add #60,r3	;Point to first pushed reg
			mov #0,r1 	;Reg label
		
			mov #3,r5	;Reg per line
			mov #5,r4	;Reg count
MonitorAgain5:
			mov.l @r3,r2	;Get reg
			add #-4,r3		;Move to next reg
		
			bsr ShowReg
			nop
				
			add #1,r1		;Reg label
			
		dt r5
		bf MonitorNoNL5
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL5:
		dt r4
		bf MonitorAgain5
		
		
			mov r6,r2 ;stc SR,r2
			mov #'S',r0
			mov #'R',r1
			bsr ShowRegSpec
			nop
			
			mov #' ',r0
			bsr PrintChar
			nop
			
			mov #'T',r0
			ldc r6,sr
			bt MonitorSRT

			mov #'F',r0
MonitorSRT:				
			bsr PrintChar
			nop
			
			bsr NewLine
			nop
			bsr NewLine
			nop
		ldc r6,sr
	popall
	rts
	nop
	

Monitor3:
	pushall
		mov sp,r3
		add #60,r3	;Point to first pushed reg
		mov #0,r1 	;Reg label
		
		
		mov #3,r5	;Reg per line
		
		mov #3,r4	;Reg count
MonitorAgain3:
		mov.l @r3,r2	;Get reg
		add #-4,r3		;Move to next reg
		
		bsr ShowReg
		nop
				
		add #1,r1		;Reg label
		
		dt r5
		bf MonitorNoNL3
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL3:
		dt r4
		bf MonitorAgain3
		
		bsr NewLine
		nop
	popall
	rts
	nop
	
Monitor6:
	pushall
		mov sp,r3
		add #60,r3	;Point to first pushed reg
		mov #0,r1 	;Reg label
		
		mov #3,r5	;Reg per line
		
		mov #6,r4	;Reg count
MonitorAgain6:
		mov.l @r3,r2	;Get reg
		add #-4,r3		;Move to next reg
		
		bsr ShowReg
		nop
				
		add #1,r1		;Reg label
		
		dt r5
		bf MonitorNoNL6
		
		mov #3,r5	;Reg per line
		bsr NewLine
		nop
MonitorNoNL6:
		dt r4
		bf MonitorAgain6
		
		bsr NewLine
		nop
	popall
	rts
	nop
	
	include "\SrcAll_SH2\BasicFooter.asm"
	